Senior STA Engineer

Company: Qualcomm India Private Limited

Role Overview: As an ASIC Engineer within the Engineering Group (ASICS Engineering), you will define, model, design (digital/analog), optimize, verify, validate, implement, and document IP block/SoC development for high-performance, low-power products.

Minimum Qualifications:

• Bachelor's degree with 2+ years of ASIC experience.
• Master's degree with 1+ year of ASIC experience. OR PhD in a related field.

Desired Experience & Skills:

• 3+ years in Static Timing Analysis (STA), physical constraints, and implementation tools like PT, Tempus, GENUS, Innovus, ICC.
• Expertise in fixing critical timing bottlenecks, preparing complex ECOs for convergence across corners using Tweaker/Tempus.
• Solid knowledge of power minimization techniques and high-performance implementation methods (PPA optimization).
• Familiarity with deep submicron process technology nodes.
• Strong scripting skills in Perl and TCL.