Design Flow / Methodology Engineer

About the Role

We are seeking an experienced Design Flow / Methodology Engineer to own the RTL-to-GDSII implementation flow and to define how AI automates it. You will build, qualify, and maintain the synthesis, place-and-route, timing, and physical signoff methodology that every project runs on, and you will turn that hands-on flow expertise into product.

Responsibilities

• Own the end-to-end RTL-to-GDSII design flow: synthesis, floorplanning, place-and-route, clock tree synthesis, timing closure, and physical signoff.
• Build, qualify, and maintain reusable flow infrastructure, scripts, and automation that scale across IPs, subsystems, and full-chip projects.
• Drive timing, power, area, and congestion methodology, including static timing analysis (STA) setup, constraint development, and signoff correlation.
• Integrate and qualify EDA tools and manage PDKs, standard cell libraries, IP, and technology files across nodes.
• Own physical verification and signoff flows: DRC, LVS, antenna, EM/IR, and reliability checks.
• Define and drive AI-assisted design flow automation: parameter tuning, flow orchestration, congestion and timing-closure assistance, and LLM-assisted methodology workflows.