Field-Programmable Gate Arrays Engineer
Full Job Description
About the Job
🚀 We’re Hiring: Senior RTL Engineer — SoC / RISC-V
Join IndieSemiC and help build next-generation silicon powering the future of autonomous, electric, and intelligent systems. At Indie, we are advancing cutting-edge semiconductor solutions for automotive and industrial applications, enabling technologies such as ADAS, electrification, and advanced sensing platforms.
Role: Senior RTL Engineer
Location: Vastrapur, Ahmedabad
Experience: Senior Level
Employment Type: Full-time
What You’ll Do
- Lead RTL design for complex SoC and RISC-V processor architectures
- Own micro-architecture definition, IP development, and block integration
- Drive scalable SoC architecture aligned with PPA (Power, Performance, Area) targets
- Establish and enforce high-quality RTL design methodologies
- Collaborate cross-functionally with verification, FPGA, and backend teams
Key Responsibilities
- Design, review, and optimize RTL for CPU, cache, and SoC IPs
- Develop RISC-V features and custom extensions
- Perform lint, CDC, and synthesis readiness checks
- Support FPGA bring-up, debugging, and silicon root-cause analysis
Why Join IndieSemiC?
- Work on cutting-edge silicon powering next-gen automotive and sensing platforms
- Collaborate with world-class engineering teams across global design centers
- Shape the architecture of future SoCs and processor technologies
- Be part of a fast-growing, innovation-driven semiconductor company
📩 Interested? Apply now or share your profile at: hr@indiesemic.com Know someone perfect? Tag or refer them!
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Company
IndieSemiC
IndieSemiC is revolutionizing India's tech landscape by pioneering the design and development of semiconductor chipsets and RF modules, including BLE, WIFI, and LORA. Specializing in ASIC chip design,...