Front-End Engineer – Clocking Management

As a Front-End Engineer within the frontend methodology and design enablement team, you will be critical in defining and implementing SoC clocking architecture, developing clock macro cells, and automating the constraint management system. Your responsibilities will include defining clocking schemes, designing and validating clock macro cells, collaborating with cross-functional teams, ensuring clock domain consistency, developing automation tools, debugging timing issues, and documenting the architecture. The ideal candidate will have 5+ years of experience in digital design, clocking architecture or frontend implementation. You should have a strong understanding of SoC clocking techniques and macro cell development. Proficiency with SDC constraint management for synthesis and STA, EDA tools like PrimeTime, and scripting languages like Python and TCL are also required.

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